This invention relates to the detection of impedance mismatches in circuits. It is disclosed in the context of a system for detecting impedance mismatches in forward and return CATV signal paths, but it is believed to be useful in other applications as well.
Various techniques for detecting impedance mismatches and other phenomena in signal paths are known. There are, for example, the techniques illustrated and described in U.S. Pat. Nos. 5,343,286; 5,323,224; 5,307,140; 5,069,544; 5,066,118; 5,008,545; 4,904,864; 4,893,006; 4,838,690; and, 4,816,669. While most of these references disclose their techniques in the context of optical time domain reflectometry (OTDR), the concepts disclosed in them are applicable to other impedance mismatch detecting techniques as well. In some of these references, reflections from impedance mismatches are employed in one way or another to determine the existence, and in certain circumstances the locations, of those mismatches. These references all teach the application of test signals having configurations calculated to enhance detection of such reflections and extraction of the information sought from such reflections. Other techniques have been proposed for detecting imperfections in forward and return circuits in CATV systems. There are, for example, the systems proposed in Williams, Proofing and Maintaining Upstream Cable Plant With Digital Signal Analysis Techniques, May, 1997. However, this paper also proposes the application of a test signal having a configuration calculated to enhance detection of imperfections in the forward and return paths of CATV systems. Most of such systems also require a clear channel for the conduct of the test.
According to one aspect of the invention, a method for determining the transit time to a feature in a digital communication circuit comprises generating a quantity of data that is at least quasi-random, transmitting the quantity of at least quasi-random data along the circuit from a transmitting end of the circuit, recovering reflections from the circuit adjacent the transmitting end of the circuit, correlating the reflections with the quantity of data to generate a correlation result, identifying a reflection peak in the result, and correlating the reflections with the data to generate a correlation result, for identifying a reflection peak in the result, and for determining a time delay to the reflection peak.
Illustratively according to this aspect of the invention, the method comprises a method for determining the location of an impedance mismatch in the circuit, the step of recovering reflections from the circuit comprising the step of recovering reflections from impedance mismatches in the circuit. The method further comprises the step of multiplying the propagation velocity of the data through the circuit by the time delay to the reflection peak to determine the round trip distance to the impedance mismatch.
Illustratively according to this aspect of the invention, the steps are repeated, and average time delays over the number of repetitions are developed.
Illustratively according to this aspect of the invention, the step of developing average time delays over the number of repetitions comprises summing the time delays determined by the repetitions, and dividing the sum of the time delays by the number of repetitions.
Additionally illustratively according to this aspect of the invention, the method further comprises the step of passing the data through a digital root raised cosine filter.
Further illustratively according to this aspect of the invention, the step of passing the data through a digital root raised cosine filter comprises the step of passing the data through a digital root raised cosine filter with an excess bandwidth factor of 20%.
According to another aspect of the invention, an apparatus for determining the transit time to a feature in a digital communication circuit comprises a first device for generating data that is at least quasi-random, a second device for coupling the first device to the circuit to transmit the at least quasi-random data along the circuit from a transmitting end of the circuit, a third device for recovering reflections from the circuit, the third device coupled to the circuit adjacent the transmitting end of the circuit, and a fourth device for correlating the reflections with the data to generate a correlation result, for identifying a reflection peak in the result, and for determining a time delay to the reflection peak.
Illustratively according to this aspect of the invention, the apparatus comprises an apparatus for determining the location of an impedance mismatch in the circuit, the third device recovering reflections from impedance mismatches in the circuit, and the fourth device comprising a fourth device for multiplying the propagation velocity of the data through the circuit by the time delay to determine the round trip distance to the impedance mismatch.
Illustratively according to this aspect of the invention, the fourth device comprises a fourth device for correlating multiple reflections with multiple strings of data, and for developing average time delays over the number of repetitions.
Illustratively according to this aspect of the invention, the fourth device comprises a fourth device for correlating multiple reflections with multiple strings of data to generate multiple correlation results, for identifying multiple reflection peaks in the multiple correlation results, for multiplying the propagation velocity of the data through the circuit by multiple time delays to the multiple reflection peaks, for summing the multiple time delays, and for dividing the sum of the time delays by the number of time delays.
Additionally according to this aspect of the invention, the second device comprises a digital root raised cosine filter.
Further according to this aspect of the invention, the second device comprises a digital root raised cosine filter with an excess bandwidth factor of 20%.